Peripheral component interconnect express (PCIe) is a standard for incorporating peripheral devices into computing systems. PCIe defines physical and logical interfaces and protocols for communication with PCIe compatible devices. PCIe may be used in consumer and industrial applications, for example, as a motherboard level interconnect, a passive backplane interconnect, and an expansion card interface. Various standards are based on PCIe, such as PCIe eXtensions for instrumentation (PXIe), which adapts PCIe for test and measurement applications.
PCIe compatible devices may be configured as peripheral modules and interconnected with one another and/or with a system controller through a network of PCIe switches (switch fabric) in a modular instrumentation framework (chassis). For example, the system controller may be connected to a root complex having PCIe ports, each of which is connected to a peripheral device or a PCIe switch. Each PCIe switch is connected to multiple PCIe slots in the chassis, which are configured to receive peripheral modules. The flexible nature of the switch fabric enables customization of an individual system.
Currently, high-speed digital and radio frequency (RF) signal test applications require higher processing capabilities to catch up with increasing bandwidth requirements of modern high bandwidth communications. In conventional modular instrumentation frameworks, such as PXIe compatible frameworks, more signal processing and data handling responsibilities in a measurement flow are being moved from traditional personal computer (PC)-based processing to hardware-based processing and acceleration, in which dedicated hardware is included in a measurement system for data processing. For example, high performance Graphics Processing Units (GPUs) may be used in PC graphics cards for measurement acceleration.
In addition, there is increasing interest in use of customizable accelerators, such as field programmable gate array (FPGA) accelerators, for measurement acceleration and other data processing. An advantage of FPGA-based acceleration is in the customizable nature of FPGAs, in which more efficient processing can be realized on dedicated logic and Digital Signal Processing (DSP) resources than can be achieved using general purpose central processing units (CPUs) and/or GPUs. FPGA accelerators are also able to provide more real-time and deterministic measurement/processing capabilities than can be achieved using normal PC-based processing. Further, the use of FPGAs for acceleration provides a higher power-per-watt advantage over CPU and GPUs, enabling lower power consumption and higher performance than traditional CPU-based and GPU-based acceleration.
With regard to conventional PXIe modular instrumentation, FPGA acceleration processing resources are incorporated in the form of a dedicated peripheral module that allows customized data processing algorithms and designs to be implemented. FIG. 1 is an illustrative plan view of conventional PXIe modular instrumentation, including a chassis 110 connected to a host PC 150. In particular, FIG. 1 shows the front panel of the chassis 110, which includes a vector signal analyzer 120, an accelerator module 130 and an interface module 140. Each of the various modules forming the vector signal analyzer 120, the accelerator module 130 and the interface module 140 plugs into a separate slot arranged on a backplane (not shown in FIG. 1) of the chassis 110. The vector signal analyzer 120 actually occupies eight adjacent peripheral slots, while the accelerator module 130 and the interface module 140 each occupies one peripheral slot. Slot panels, such as representative slot panel 115, are attached to the front panel of the chassis 110 for cover spaces corresponding to unused slots. Generally, the vector signal analyzer 120 may stream data at 2.5 gigabytes/second to the accelerator module 130, where real-time measurements, such as fast Fourier transform (FFT) and frequency mask triggering, may be performed prior to streaming the data to the host PC 150 at 4.0 gigabytes/second for display via the interface module 140. A downside of this conventional configuration, however, is that the accelerator module 130, which is commonly used in many applications, uses up one of the peripheral slots of the backplane that could otherwise be occupied by a less common peripheral module. Moreover, a typical two-channel RF measurement system requires up to two FPGA accelerator modules, thus occupying two peripheral slots that could otherwise be used for other modular measurement devices.